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Memory architecture
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#	Item
461	CHERI: A Hybrid Capability-System Architecture for Scalable Software Compartmentalization Robert N. M. Watson∗ , Jonathan Woodruff∗ , Peter G. Neumann† , Simon W. Moore∗ , Jonathan Anderson‡ , David Chisnall∗ Add to Reading List Source URL: www.cl.cam.ac.uk Language: English - Date: 2015-04-13 12:22:46 Real-time operating systems Memory management Access control Capability-based security Memory protection Kernel EROS Object-capability model Memory management unit Computing Computer architecture System software
462	Optimizing Google’s Warehouse Scale Computers: The NUMA Experience Lingjia Tang† , Jason Mars† , Xiao Zhang‡ , Robert Hagmann‡ , Robert Hundt‡ , and Eric Tune‡ † University of California, San Diego Add to Reading List Source URL: static.googleusercontent.com Language: English - Date: 2013-03-05 19:49:59 Computer hardware Computer architecture Non-Uniform Memory Access Cache Uniform memory access AMD 10h Microarchitecture K42 Computing Computer memory Parallel computing
463	API Deobfuscator: Identifying Runtimeobfuscated API calls via Memory Access AnalysisSeokwoo Choi Add to Reading List Source URL: www.blackhat.com Language: English - Date: 2015-03-27 11:09:02 Microsoft Windows Windows NT architecture Obfuscation Application programming interface Technical communication Portable Executable Dynamic-link library Obfuscated code Source code Computing Computer programming Software
464	Big Data Life Sciences WP_Layout 1 Add to Reading List Source URL: asperasoft.com Language: English - Date: 2013-04-07 16:28:19 Computer buses Hardware virtualization X86 architecture X86 virtualization Intel Core Xeon Intel PCI Express Multi-channel memory architecture Computer hardware System software Computing
465	AN INTRODUCTION TO SOAR PROGRAMMING John Rieman, MRC-APU 15 March 1995 e-mail: web: http://www.cs.colorado.edu/~rieman [put into postscript from rtf, some page breaks put in, and moved to Europe Add to Reading List Source URL: csis.pace.edu Language: English - Date: 2003-05-25 14:23:37 Cognition Soar ACT-R Memory Working memory Cognitive model Cognitive architecture Artificial intelligence Mind
466	Installing Power POS WindowsSection II Section II.A. - 1 Add to Reading List Source URL: www.posintl.com Language: English - Date: 2009-02-20 04:36:39 DOS memory management Configuration files Microsoft Windows CONFIG.SYS OS/2 Windows 95 Conventional memory HIMEM.SYS Double-click Computing Computer architecture Software
467	Data Access Partitioning for Fine-grain Parallelism on Multicore Architectures Michael Chu∗ Rajiv Ravindran† Add to Reading List Source URL: cccp.eecs.umich.edu Language: English - Date: 2007-09-16 20:08:29 Central processing unit Parallel computing Microprocessors Computer memory CPU cache Cache Microarchitecture Multi-core processor Lookup table Computing Computer hardware Computer architecture
468	Technical white paper Understanding HP IO Accelerators HP IO Accelerator architecture and performance Add to Reading List Source URL: www.fusionio.com Language: English - Date: 2013-11-27 18:06:36 Non-volatile memory Standards organizations IO Accelerator IOPS Solid-state drive Flash memory PCI Express IOdrive Serial ATA Computer hardware Computing Computer memory
469	KERNEL WARS: KERNEL-EXPLOITATION DEMYSTIFIED Introduction to kernel-mode vulnerabilities and exploitation Add to Reading List Source URL: www.blackhat.com Language: English - Date: 2014-12-16 19:06:37 X86 architecture X86-64 Kernel Ioctl Linux kernel Thread Architecture of Windows NT Memory protection Computer architecture Software Computing
470	AnswersThatWorkTM Award v6.00PG BIOS setup guidelines BIOS – Award v6.00PG BIOS setup guidelines Add to Reading List Source URL: www.answersthatwork.com Language: English - Date: 2007-07-26 14:47:49 Computing Motherboard Interrupt request Power-on self-test Nonvolatile BIOS memory Video Graphics Array American Megatrends Booting IBM Personal Computer/AT BIOS Computer hardware Computer architecture

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